白皮書
Catapult LP 提供功耗最佳化 ESL 硬體實現流程
本白皮書大致說明了用於探索低功耗架構的 Catapult 流程，並詳細探討了使用 Catapult LP 設計流程可以實現的低功耗最佳化成果。本次案例研究是使用真實的客戶設計。Catapult 分別在啟動和未啟動低功耗最佳化的情況下合成這些設計。在啟動低功耗最佳化的情況下，Catapult 在背景中使用 Calypto 的 PowerPro 技術來進行 RTL 功耗最佳化和估算功耗的使用情形。
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Webinar
Xperi®: A Designer’s Life with HLS
This webinar will discuss two aspects of their experience going from RTL to HLS. The first topic is using HLS for algorithms such as Face Detection th
Webinar
High-Level Synthesis Verification Technologies and Techniques
This session will describe applying known and trusted static, formal and dynamic approaches to verification performed at the C++ or SystemC HLS level of abstraction.
Webinar
NVIDIA: High-Level Synthesis in Agile System-on-Chip Flows: Overview and Techniques
This talk provides a brief overview of NVIDIA Research’s use of Catapult HLS and highlights some useful features and flows of the Connections library, such as the ability to back-annotate SystemC simulations.