Korean Catapult High-Level Synthesis and Verification
Korean Design Platform Empowering Designers
To achieve the maximum productivity gain from a C++/SystemC HLS methodology, it is necessary to have the performance and capacity to handle today’s large designs coupled with a comprehensive flow through verification and implementation.
Catapult HLS Productivity Gain
To achieve the maximum productivity gain from a C++/SystemC HLS methodology, it is necessary to have the performance and capacity to handle today’s large designs coupled with a comprehensive flow through verification and implementation.
관련 자료
LG전자: Catapult HLS 플랫폼을 활용한 비디오 인코더 IP 설계 최적화 및 검증
이러한 새로운 디자인 방법을 통해 LG전자 SoC 센터에서는 Catapult를 적용하여 IP 개발에서 설계시간과 비용의 단축효과를 보았습니다. 향후 미래의 IP 설계에 대해서도 더 많은 적용을 할 예정입니다.
NVIDIA: High-Level Synthesis in Agile System-on-Chip Flows: Overview and Techniques
This talk provides a brief overview of NVIDIA Research’s use of Catapult HLS and highlights some useful features and flows of the Connections library, such as the ability to back-annotate SystemC simulations.
LG Electronics: Video Encoder IP Design Optimization and Verification Using Catapult
In this session, LGE describes a new design approach which concluded that adopting Catapult in IP development increases efficiency in time and cost, and they plan to increase usage in future IP projects.