Chips&Media: Design and Verification of Deep Learning Object Detection IP
Chips&Media, a leading provider of high-performance video IP for SoC design, took a unique approach to design their latest IP for detecting objects in real-time. They decided to adopt a new High-Level Synthesis (HLS) flow to implement their deep learning algorithm. But, they would have an RTL team create this algorithm, using traditional tools and another team would employ the Catapult HLS Platform flow. They would constantly compare the time it was taking to design and verify the algorithm and equate the quality of synthesis results. Read this case study to find out why the HLS flow “won” and is now being deployed on their next project.
関連情報
NVIDIA: High-Level Synthesis in Agile System-on-Chip Flows: Overview and Techniques
This talk provides a brief overview of NVIDIA Research’s use of Catapult HLS and highlights some useful features and flows of the Connections library, such as the ability to back-annotate SystemC simulations.
LG Electronics: Video Encoder IP Design Optimization and Verification Using Catapult
In this session, LGE describes a new design approach which concluded that adopting Catapult in IP development increases efficiency in time and cost, and they plan to increase usage in future IP projects.