Optimize AI chips with Embedded Analytics

The new generation of ICs being developed to address artificial intelligence (AI) applications present unique challenges to optimizing hardware and software during development and once those designs are deployed in the field. Tessent Embedded Analytics IP gives designers intimate visibility into the operation of the chip, which is vital for the on-time development of novel AI architectures. This paper describes how using Embedded Analytics in AI chips addresses the need for system-level visibility of performance that makes software development and hardware integration much more efficient.

Turning complexity into a competitive advantage

Developers of complex AI chips and the systems they support face new
levels of familiar challenges: How to get the product to
market as quickly and efficiently as possible, with the
required level of quality?

The best way to harness systemic complexity of large AI designs and
turn it into a competitive advantage is to
embrace technological solutions that provide systemlevel
visibility throughout the design and deployment of the device.

The Tessent Embedded Analytics platform combines IP
and software designed to provide functional insights
into complex SoC behavior. Tessent silicon IP can
monitor internal bus transactions, processor execution,
and other system-level activity within the device,
correlated across the system, and at the right level of
detail for the task in hand. The platform also contains
the SW tools, APIs, and libraries required to process
functional data and give designers a detailed
understanding of the behavior of the hardware and
software in the embedded system.