Deploying High-Level Synthesis (HLS) in a DO-254/ED-80 workflow

To remain competitive in a challenging market, avionics companies continue to innovate across all aircraft-related systems, including flight management, communication, navigation, and in-flight entertainment. New features and capabilities demanded on board aircraft have a direct impact on the complexity of semiconductor design and verification.

Challenge to Deliver Products on Time and on Budget

Companies are continually challenged to deliver products on time and on budget, while simultaneously demonstrating a rigorous safety process adhering to RTCA DO-254 and EUROCAE ED-80, the principal standards assuring airborne electronic hardware is safe for use. To meet these challenges, companies must adopt new design and verification methodologies making their engineers more efficient.

High-Level Synthesis Adoption Growth

High-Level Synthesis (HLS) continues to grow in adoption as it provides a shift-left enabling designers to quickly develop, test, and deploy new algorithms on hardware targets. The adoption of new technologies within safety-critical industries is often challenging as these technologies must be proven safe before allowed into production environments. The demonstration of safeness requires both the technical acceptance and education of the certification authorities. This paper describes the use of HLS within a DO-254/ED-80 workflow and the evidence HLS provides.