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相关资源
Webinar
Harvard University: Effective SW/HW Co-Design of Specialized ML Accelerators Using Catapult HLS
Harvard sheds light on their agile algo-hw co-design & co-verification methodology powered by HLS. It led to an order of magnitude improvement in the design effort across 3 generations edge AI accelerator SoCs.
Webinar
Stanford University: Edge ML Accelerator SoC Design Using Catapult HLS
Describes the design and verification of the systolic array-based DNN accelerator taped out by Stanford, the performance optimizations of the accelerator, and the integration of the accelerator into an SoC.
Webinar
How NVIDIA Uses High-Level Synthesis Tools for AI Hardware Accelerator Research
With constant change in AI/ML workloads, NVIDIA leverages a High-Level Synthesis design methodology based off SystemC and libraries like MatchLib to maximizing code reuse & minimizing design verification effort