Artykuł techniczny

Concepts of Power Integrity: Controlling impedance across a bare cavity

Czas czytania: 15 min
Impedance in PDN cavity

Without a low-impedance path across the power distribution network (PDN), noise can propagate throughout a PCB, causing bit errors, voltage ripples, timing violations, and more. This paper examines how impedance can be controlled in the PDN cavity.

Udostępnij

Powiązane treści

Circuit Design and Verification of 7nm Low-Power, Low-Jitter PLLs
Webinar

Circuit Design and Verification of 7nm Low-Power, Low-Jitter PLLs

Learn how Silicon Creations met the stringent circuit verification and noise analysis requirements for their latest 7nm high performance analog and mi