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Korean Catapult High-Level Synthesis and Verification

Korean Design Platform Empowering Designers

Catapult High-Level Synthesis and Verification

To achieve the maximum productivity gain from a C++/SystemC HLS methodology, it is necessary to have the performance and capacity to handle today’s large designs coupled with a comprehensive flow through verification and implementation.

Catapult HLS Productivity Gain

To achieve the maximum productivity gain from a C++/SystemC HLS methodology, it is necessary to have the performance and capacity to handle today’s large designs coupled with a comprehensive flow through verification and implementation.

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관련 자료

Xperi®: A Designer’s Life with HLS
Webinar

Xperi®: A Designer’s Life with HLS

This webinar will discuss two aspects of their experience going from RTL to HLS. The first topic is using HLS for algorithms such as Face Detection th

High-Level Synthesis Verification Technologies and Techniques
Webinar

High-Level Synthesis Verification Technologies and Techniques

This session will describe applying known and trusted static, formal and dynamic approaches to verification performed at the C++ or SystemC HLS level of abstraction.

NVIDIA: High-Level Synthesis in Agile System-on-Chip Flows: Overview and Techniques
Webinar

NVIDIA: High-Level Synthesis in Agile System-on-Chip Flows: Overview and Techniques

This talk provides a brief overview of NVIDIA Research’s use of Catapult HLS and highlights some useful features and flows of the Connections library, such as the ability to back-annotate SystemC simulations.