Veloce Simulation-Acceleration Methodologies

While advanced verification technologies have streamlined the process of developing a testbench environment and increased its reuse significantly, it has highlighted another concerning area. With growing design size and complexity, the verification time for a single run System-on-chip (SoC) can run into weeks to months on the fastest simulator. Veloce simulation acceleration technology migrates and accelerates the simulation environment quickly and efficiently by using Veloce's co-model bandwidth technology combined with IEEE and Accellera standards for communication and methodology.