Tessent UltraSight-V
Comprehensive debug and trace solution for RISC-V based SoCs
The time, effort and cost of debugging and optimizing software running on current multi-core SoCs is escalating as design complexity increases. More efficient methods to debug, iterate, and scale such systems are required to identify hardware and real-time software issues in such systems.
Tessent UltraSight-V, part of the Tessent Embedded Analytics product family, is a comprehensive solution for RISC-V based SoCs. With a combination of embedded IP and software, UltraSight-V empowers embedded software engineers in developing high-performance embedded software.
Related resources
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LG Electronics: Video Encoder IP Design Optimization and Verification Using Catapult
In this session, LGE describes a new design approach which concluded that adopting Catapult in IP development increases efficiency in time and cost, and they plan to increase usage in future IP projects.