L-Edit IC & L-Edit Advanced
Analog/Mixed-Signal (AMS) design and verification
L-Edit increases your productivity by reading and writing directly to an OpenAccess database, supporting both FinFET and planar technologies. Work in teams with multi-user support that can implicitly lock a cell then you start editing and then release it when the window is closed. Save time by using foundry-provided files directly, allowing you to avoid having to set up technology information manually. Maximize efficiency with L-Edit’s physical design features, reduce your CAD manager’s support burden, and get up and running easily with platform independence and flexible licensing.
Related resources
Catapult Formal Factsheet
Formally find mistakes, ambiguities, and undesirable design issues or user constraint problems early in the HLS design and verification process. Catapult Formal enables verification and coverage closure flow at C-level.
Catapult High-Level Synthesis and Verification Fact Sheet
Industry leading C++/SystemC High-Level Synthesis with Low-Power estimation/optimization. Design checking, code and functional coverage verification plus formal make HLS more than mere “C to RTL.
High-Level Synthesis Verification Technologies and Techniques
This session will describe applying known and trusted static, formal and dynamic approaches to verification performed at the C++ or SystemC HLS level of abstraction.