fact sheet

Catapult High-Level Synthesis and Verification Fact Sheet

Design Platform Empowering Designers

Catapult High-Level Synthesis and Verification Flow

Catapult High-Level Synthesis (HLS) has been proven in production design flows with 1,000s of designs and the resulting RTL adheres to the strictest corporate design guidelines and ECO flows. In addition to Catapult HLS, only Catapult has integrated High-Level Verification tools and methodologies that enable designers to complete their verification signoff at the C++ level with fast closure for RTL. Discover this industry leading family of products.

Catapult HLS Productivity Gain

To achieve the maximum productivity gain from a C++/SystemC HLS methodology, it is necessary to have the performance and capacity to handle today’s large designs coupled with a comprehensive flow through verification and implementation.

Share

Related resources

Eldo Platform
Fact Sheet

Eldo Platform

Eldo Platform delivers the required SPICE accuracy and performance to design and verify complex automotive IC designs using the BCD technology.

Kronos Characterizer
Fact Sheet

Kronos Characterizer

Library characterization is a key factor in today’s design flows. Modern static timing analysis (STA)-based design flows depend on characterized Liberty® models to work.

Advanced planning and scheduling (APS) for Industrial Machinery
E-book

Advanced planning and scheduling (APS) for Industrial Machinery

Gain better visibility and improve manufacturing processes with advanced planning and scheduling software. Read the ebook to learn more.