白皮書
利用 Symphony 進行 EESY-IC 高速 ADC 的混合訊號驗證
Symphony 平台進行其混合訊號驗證流程，以驗證高速的 ADC 晶片，這些晶片在軟體無線電應用中，用於 RF 訊號的部分取樣
此白皮書探討了 EESY-IC 如何選擇 Symphony 平台進行其混合訊號驗證流程，以驗證高速的 ADC 晶片，這些晶片在軟體無線電應用中，用於無線射頻 (RF) 訊號的部分取樣。高速 ADC 晶片具有豐富的類比內容與數位可控性，且必須以較長的模擬時間和極高的準確度，模擬大型的混合訊號 netlist。使用 Symphony 後，EESY-IC 能在幾小時內，以所需的準確度來驗證全晶片混合訊號設計，生產力比原先採用的流程高出 10 倍。
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