Meet manufacturing process requirements for metal filled areas and planes

Often designers are amazed at the diversity of requirements fabricators and manufacturers have for metal filled areas in advanced package designs. Package fabricators and manufacturers have strict metal fill requirements addressing two main issues. First, the dielectric and metal layers can be very thin, 15 µm or less, and during the build-up and RDL process they can suffer from areas of delamination due to trapped pockets of gas. Second, uneven conductor densities on the same layer or across layer pairs can cause warpage in the package and/or the wafer.

Proven methodologies to meet PDN specifications

The combination of these issues makes meeting manufacturing rules a challenge. Further, the diversity of substrate technologies from numerous vendors means there’s no one-size-fits-all solution. In this paper, we will walk through three methodologies that are commonly utilized on advanced package designs:

• Dynamic hatched filled metal areas
• Outgassing voids
• Dummy metal fill

These are the most common methods to achieve foundry/OSAT requirements for metal areas and planes in advanced package designs such as interposers, high density-fan-out wafer level package (HDFOWLP), and high pin count flip chip BGAs, so it is important to understand how to use them.

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