技術文件

Machine learning assisted effective OPC verification hotspot capture

Comparison OPC snapshots of the same hard failure spots before fixing and after fixing.

This paper introduces a breakthrough methodology using Siemens EDA’s Calibre machine learning (ML)-assisted Optical and Process Correction (OPC) verification tool for semiconductor manufacturing. Traditionally, capturing lithographic process hotspots required complex, highly tuned rule decks and expert engineering, leading to high development costs and effort. The new approach leverages pattern classification powered by machine learning to replace manual filtering and constraints. This innovation uses a single constraint for each failing mechanism, with a limiting function that controls data volume without missing real hotspots. Experiments on a 20 nm EUV metal layer show that this approach reduces the unique hotspot count from millions to thousands—an improvement by two orders of magnitude—making full-chip hotspot monitoring for wafer verification feasible and efficient. The strategy streamlines verification flow, saves engineering resources, and prepares the path for big data analytics in process and mask development.

This paper was originally presented at the 2023 SPIE Photomask Technology + EUV Lithography conference.

Lianghong Yin, Marko Chew, Shumay Shang, Le Hong, Fan Jiang, Ilhami Torunoglu, "Machine learning assisted effective OPC verification hotspot capture," Proc. SPIE 12751, Photomask Technology 2023, 127510W (21 November 2023); https://doi.org/10.1117/12.2687752

What you’ll learn:

  • How machine learning-based pattern classification in Calibre OPC verification replaces traditional rule-based filtering and constraints for hotspot detection.
  • The measurable benefits of reducing unique hotspot counts from millions to thousands, enabling practical SEM inspection in chip manufacturing.
  • Fundamentals of implementing and scaling ML models for layout error detection and the impact on engineering workload and process efficiency.

Who should read this:

  • Semiconductor process engineers and OPC verification specialists
  • EDA tool users working on design-for-manufacturability and mask verification
  • R&D engineers and managers looking to streamline hotspot detection and inspection workflows

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