System-in-package and module assembly verification

By performing DRC/LVS verification prior to tape-out of a system-in-package (SiP)/module assemblies, engineers can be confident that the intended logical and physical connectivity matches the true tape-out design data.

The importance of a fully integrated flow for system-in-package verification

Siemens EDA understands the difficulties and challenges that come with verifying these complex package and module designs and has created a fully integrated flow to verify and validate such designs. Xpedition Substrate Integrator (xSI) provides a central hub for consolidating all relevant design data for a module or system-level design. Through native integration with xSI, Calibre 3DSTACK can be used to perform robust, automated DRC/LVS verification of complex module designs to ensure design success.

How Xpedition Substrate Integrator (xSI) provides an integrated solution

This paper describes the essential features of a fully integrated design rule checking (DRC)/ layout versus schematic (LVS) flow to verify and validate SiP/module assemblies and the best tools to deliver this solution.

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