Heterogenous device integration has become a critical capability need for the next generation of AI, Data Center, Graphics and FPGA devices. Advanced packaging technologies such as EMIB (embedded multi-die interconnect bridge), Foveros & Co-EMIB are enabling a dramatic increase in interconnect density and bandwidth, allowing the integration of multiple types of heterogenous die (Logic, memory, transceiver, and multiple nodes) onto a single package. In addition to dense die to die interconnect, there is a significant need for advances in design flows and methodologies, power delivery, high speed I/O interconnects and thermal cooling technologies to enable of next generation of heterogenous devices.
This presentation covers the unique tools and flow challenges related to system level design and planning that come with localized high-density between two or more dies on an organic package connected with an EMIB. The flow will also cover the complete 3DStack verification that includes the fully routed EMIB and Package. Finally, we discuss the electrical and verification methodologies to complete the system level analysis.