更快实现 3D IC 创新

当今半导体工程面临的最大挑战之一是提供一流的器件，同时应对单片 IC 设计流程的技术扩展和成本限制。为了克服这些挑战，越来越多的企业开始采用异构集成以及将 IC 和专用小芯片（在不同的工艺几何中实现）3D 堆叠到 3D IC 中。小芯片是专门设计和优化的小型 IC，可与其他小芯片和全尺寸 IC 一起在封装内工作。在异构设计中，芯片和小芯片通过垂直布线堆叠并互连。设计人员还可以将其与器件封装内硅中介层上的 3D 内存堆栈（例如高带宽存储器）相结合。

通过下载此电子书，了解如何更快地设计更智能的未来。

3D IC heterogeneous systems require co-optimization and co-simulation

Companies wanting to lead the way in 3D heterogenous integrated design must adopt four enabling approaches:

• Transition from design-based to systems-based optimization for consistent system representation throughout design
• Expanding the supply chain and tool ecosystem requiring interoperability and openness
• Balancing design resources across multiple domains with system co-optimization (STCO)
• Globalization requires complete system focus and cohesiveness across engineering teams (silicon, packaging and PCB) around the world

Learn how to use the Siemens heterogeneous 3D IC solution to create designs that meet or exceed your PPA goals and improve the differentiation, profitability and time to market of your next market-leading project.

Siemens 3D IC workflows: packed with powerful capabilities

The Siemens 3D IC heterogeneous package workflow catapults you into the future of IC design today, with:

• Heterogeneous planning and co-design using prototyping/planning and integration of 3D IC packages enable a full system perspective for STCO-based modeling and early prototyping
• Ecosystem interoperability and openness with industry standards, supporting third-party tools, certified reference flows, process design kits (PDK) and assembly design kits (ADK)
• Physical verification through industry-proven assembly-level 3D IC verification (DRC/LVS)
• Multi-domain testing for 3D IC architectures with known coverage through standards for 3D IC multi-domain testing