Application of Intel-Siemens 3DIC thermal workflow on Intel EMIB 2.5D and EMIB 3.5D designs

In last year’s Siemens U2U conference, we described a new thermal workflow that Intel Foundry prescribes using Siemens 3DIC thermal solutions. We demonstrated it on an embedded multi-die bridge 2.5D (EMIB 2.5D) design. After a year more collaboration with Siemens on enhancing this workflow, we demonstrate it on some of the recent Intel advanced chiplet packaging options. Specifically, we demonstrate on two EMIB 2.5D designs, one with just EMIBs and the other with also an EMIB-TSV (or EMIB-T), and on an EMIB 3.5D design. We also show how this workflow can be used for modeling backside power delivery networks, a key component in Intel 18A and smaller process nodes.