Enabling a critical phase in SoC development

High speed execution of an SoC model on an FPGA-based prototyping system is essential—both to permit development and verification of the full software stack and to understand hardware/software interactions—before silicon is available.

But for SoC designs that include high-speed, voluminous I/O, it is equally essential that the prototype be exercised with large amounts of real-world I/O over extended periods—not with short bursts of synthetic data. In the past, this has been a serious problem for design teams, diverting critical resources away from SoC design and into fixturing.

But Siemens has solved this problem uniquely, with a family of extension boards that integrate at- or near-speed I/O directly onto the Veloce proFPGA CS boards, and onto the FPGA’s I/O pins.