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Innovator3D IC Layout (i3DL)
A powerful, proven implementation platform for next‑generation 2.5D/3D IC and heterogeneous chiplet-based packaging.
Innovator3D IC Layout (i3DL) delivers a comprehensive, high‑performance environment for designing today’s most advanced semiconductor packages. With support for multi‑die and chiplet architectures, 2D/3D editing, AI‑infused UX, and integrated electrical/thermal analysis, it streamlines design creation, verification, optimization, and signoff. Its patented routing, concurrent team design capabilities, and correct‑by‑construction methodology reduce iterations, accelerate cycle time, and ensure manufacturing-ready quality across even the largest and most complex designs.
What you will learn:
- Key capabilities that enable seamless 2D/3D editing, visualization, and built‑in 3D DRC within a unified layout environment.
- The advantages of multi‑user concurrent team design for accelerating cycles on high‑pin‑count, multi‑die, and chiplet-based packages.
- The role of patented sketch routing and rules‑by‑area features in improving routing quality, control, and throughput in dense interposer and substrate designs.
- How integrated DRC, PDK/ADK support, and Calibre signoff workflows ensure correct‑by‑construction design and reduce costly ECO iterations.
- Insights into full‑package electrical and thermal modeling using built‑in EM solvers and Flotherm‑based analysis tools.