Artykuł techniczny

Designing a modern hardware emulation platform

Part 1

An emulator's compiler requires leading-edge synthesis, partitioning, timing analysis, clock mapping, and P&R technologies, compounded by the need to be heavily parallelized. It's no wonder that it takes so much attention from the R&D team.
Compiling a design is a computationally-intensive process, dependent on design size and complexity. To speed up the undertaking, the process is heavily parallelized in multiple threads that can run concurrently on PC farms.

To create a leading-edge emulation system, the development team must address at least four or five technological domains of the design automation know-how and draw from widely disparate technological fields. It must do so to ensure all elements of an emulator work together cohesively.

For an emulator to be competitive, all technologies must perform flawlessly with little room for error. The weakest link becomes the platform's limitation.

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