Dokument techniczny

A deep dive into HDAP LVS/LVL verification

HDAP LVS/LVL verification is a reality with Siemens EDA | diagram showing HDAP LVS tool interactions and functions

Like any electronic product, HDAP designs require extensive verification to ensure they will performed as intended, and can be reliably manufactured in quantities sufficient to meet market demand. HDAP LVS/LVL verification is an emerging process, and the data required for “signoff-level” confidence may often be incomplete. However, EDA companies are providing tools and flows that can account for various levels of data availability, while still enabling HDAP designers to run useful and valuable HDAP LVS/LVL flows.

HDAP LVS verification is a reality with Siemens EDA

As HDAP technologies become mainstream, HDAP designers require reliable design and verification flows from both foundries/OSATs and EDA companies. Siemens EDA provides complete automated flows that enable HDAP designers to run flexible HDAP LVS verification flows while accounting for various levels of data “incompleteness."

Udostępnij

Powiązane treści