더 빠르고 정확한 견적으로 중소 전자제조업체 지원 (1)

This paper explores current technology trends in high-speed links, including high-speed memory and SerDes applications, highlighting the critical roles of combined SPICE-level and IBIS-AMI modeling for accurate verification. Verifying high-speed links with IBIS-AMI during the circuit design phase presents significant complexity due to the combined effects of equalization schemes, channel S-parameters, and SPICE circuit simulations.

We introduce a unified solution where Solido™ SPICE, part of Solido™ Simulation Suite, addresses these challenges by seamlessly unifying IBIS-AMI modeling with SPICE-level circuit simulation. Additionally, we explore how Solido SPICE leverages proven Siemens HyperLynx® SI, enabling comprehensive analysis that extends from circuit-level to board-level design verification.