Automated constraint checks enhance analog design reliability

Many layout-dependent and operational environment variation effects in analog designs are subtle and hard to predict. Calibre® PERC™ analog constraint checks can consistently identify even the most minute discrepancies. The ability to quickly find and accurately correct these issues not only contributes to improved performance and product lifetime of the final product, but also minimizes the number of design cycles needed, which reduces overall design time and increases designer productivity. Many foundries have added these checks to the PDK offerings.

Calibre PERC analog constraint checks provide consistent and thorough reliability verification for critical analog design layout issues

The Calibre PERC reliability platform can automatically detect subtle errors in a variety of analog constraint checks, such as device symmetry, device orientation, the presence/absence of dummy devices, and common centroid layout accuracy. Detecting these errors enables design teams to eliminate critical issues such as well proximity effects, shallow trench isolation stress, and manufacturing and operational variation. Adding Calibre PERC automated reliability checks to the analog design and verification flow enables analog designers to consistently deliver designs on schedule, with the assurance they will perform as intended for the lifetime of the product.

A consistent evaluation process, combined with automated verification of reliability design constraints, also provides an effective method of ensuring a layout is in compliance with industry reliability standards, such as the ISO 26262 functional safety requirements for automotive IC designs, and the German-funded RESCAR 2.0 project10, which is focused on increasing the reliability of automotive electronics.