Samsung Foundry is launching the best solution for physical verification of advanced packages

In this presentation from U2U North America 2024, MinKyung Kim and DongGyu Chae of Samsung Foundry unveil a cutting-edge methodology for 3D IC connectivity verification using the Calibre 3DStack tool.

The advent of 3D integrated circuit (IC) technology with its multi-die integrated structures is a necessary complexity to continue Moore's law. 3D ICs are becoming economically viable for companies through chiplet standardization and supportive tools. However, traditional IC design approaches are insufficient for 3D ICs, necessitating advanced verification tools like physical verification and layout vs. schematic (LVS) analysis to ensure manufacturability and reliability.

Samsung Foundry shares the story of their success in verifying a 3D IC design with their new methodology along with the future roadmap for 3D IC verification that Samsung Foundry will pursue.