技術文献

STMicroelectronics’ experience with the Calibre RealTime Custom interface: 2-5X productivity gains in 14FDSOI design

Using the Calibre Real-Time Custom interface to try out multiple fixes for double patterning design rule checking violations during implementation helps designers quickly diagnose difficult odd cycle errors in custom design flows.

At STMicroelectronics, the Calibre RealTime Custom interface provided a 2-5X productivity improvement when used to apply signoff-quality design rule checking during implementation in a custom design flow for a 14nm FDSOI design. STMicroelectronics found that the Calibre RealTime Custom interface makes signoff DRC a natural part of the custom and analog/mixed-signal layout design flow.

Designers get immediate full DRC feedback as they edit their designs, and can configure specific check recipes that specify a subset of the complete DRC rules to focus the checking at different stages of the design process. With the time saved using Calibre RealTime Custom in-design signoff-quality verification, designers could concentrate on optimizing the design, rather than simply fixing DRC errors as rapidly as possible, improving the quality of the layout while maintaining or reducing tapeout schedules.

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