White paper

Smart handling of reset domain crossings to non-resettable flip-flops

No reset, no risk

two women at monitor looking thoughful

The importance of reset domain crossing (RDC) verification in ensuring robust and reliable SoC operation cannot be overstated. Verification tools for RDCs are essential in identifying potential metastability issues and ensuring that signal transitions across reset domains are properly handled. This paper presents a novel approach to tackling the challenges of RDC verification involving non-resettable registers, providing designers with a powerful tool to manage reset domain crossings with greater accuracy and confidence. In this work, we introduce a technique that allows skip-depth to be set uniquely for each RDC path, supporting different transmitter reset and receiver clock configurations. We further propose an advanced methodology within static verification tools to intelligently filter out safe RDCs, significantly reducing false positives, improving the accuracy of RDC verification, and offering a clearer and more efficient picture of the reset behavior in the design.

Advancements over existing methods

The integration of functional reset analysis into static RDC verification flows has proven to be a valuable enhancement for handling complex reset scenarios in modern SoC designs. By intelligently distinguishing between safe and unsafe crossings involving NRRs, this methodology not only improves the accuracy of reported results but also significantly lightens the verification burden for design teams. Designers are now better equipped to focus on actual violations, which improves productivity and accelerates the path to closure. This approach leads to a cleaner, more reliable RDC report with fewer false positives, enabling faster convergence and improved design confidence. Furthermore, the need for path-specific filtering, especially for crossings involving varied Tx reset and Rx clock combinations, highlights the limitations of relying solely on global skip-depth. Together, these innovations mark a substantial step forward in RDC verification, offering a smarter, more scalable approach for today’s increasingly intricate reset environments.

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