Questa Verification IP for PCI Express®

Siemens EDA Questa VIP integrates integrates seamlessly into advanced verification environments including testbenches built using UVM, Verilog, and VHDL. Siemens EDA, a part of Siemens Digital Industries Software, supports the leading industry-standard bus families, like PCIe, USB, and Ethernet, as well as thousands of DRAM and FLASH memory models. Questa VIP is the industry’s only VIP with a native SystemVerilog UVM architecture across all protocols, ensuring maximum productivity and flexibility.

Benefits

• Architected for ease-of-use and consistency across all protocols
• Comprehensive stimulus and available standard-based test suites
• Exhaustive protocol coverage and protocol checks
• UVM based testbench with ready- to-use components like monitors, loggers, and scoreboards
• Intuitive debug with transaction viewing and tracker files at various levels

Features

• Latest specification and feature support for PCIe® 6.0
• Comprehensive verification solution for all PCIe® based devices: RC, RP, EP, switch, and retimer
• Built-in analysis components
  • Protocol checkers
  • Transaction loggers
  • Functional coverage
  • Performance statistics
• Extensive stimulus from available compliance test suite for verification of each PCIe® layer

Supported specifications

• PCI Express® Base Specification Revision 6.0, version 1.0
• PCI Express® Architecture Link Layer and Transaction Layer Test Specification Revision 5.0, version 0.91 (PCI-SIG® Compliance)
• PHY Interface for PCI Express® (PIPE), version 6.1