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Selective radiation mitigation for integrated circuits

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Shortened lifecycles and cost reduction coupled with the demand for advanced capabilities continue to challenge project teams delivering IC into space systems. To meet these demands, project teams must continue to evolve across all aspects of the lifecycle, including the implementation and verification of mitigation protections against single event effects. This paper defines a methodology that enables teams to perform selective radiation mitigation and implement an optimal mitigation architecture.

Safeguarding IC reliability in space

The space sector continues to experience disruption as innovation drives the creation of new business models across government and commercial entities. Low Earth Orbit (LEO) constellations, traffic and management applications, and advanced communication systems are just a few examples where innovation is driving the next generation of semiconductors destined for space.

Space technology companies must provide the assurance of IC reliability, as their chips operate in an unwelcoming space environment. One specific activity required of development teams is building in protection to mitigate against single event upsets.

Past approaches of design mitigation, such as redundant architectures, have drawbacks—most notably impacts on power, performance, and silicon area. As well, in addition to traditional demands for lowering unit costs, accelerating development lifecycles, and adding advanced capabilities, engineering teams can reap the advantages of utilizing new resources such as commercial processes and libraries and the ability to perform selective radiation mitigation.

At the surface, selective mitigation is a straightforward concept:

  • The design functions that are deemed mission critical shall be protected.
  • The design functions that are not mission critical should not protected.

Siemens EDA offers four powerful engines that provide valuable insights into fault behavior, its impacts, and the effectiveness of surrounding mitigation:

  • Questa Analyze Architecture
  • Questa Analyze Fault
  • Austemper KaleidoScope
  • Veloce Fault App

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