Reliability in IC design relates to both physical and operational reliability, either of which can be impacted by the effect of interconnect resistance. The increasing size of full-chip layouts and the higher complexity of both designs and process technologies require a smart, application-specific extraction analysis specifically designed for interconnect parameters.
Accurately extracting and calculating the common resistance of interconnects within analog IC designs is fundamental for evaluating circuit reliability, particularly for noise and voltage drop analysis, and ESD protection verification. The Calibre PERC reliability solution provides a packaged common resistance check that simplifies and automates this technique, ensures accurate and efficient resistance measurements, and supports fast and accurate debugging of any errors detected.