The evolving landscape of SoC vulnerabilities and analog threats

SoC integrators know that a software-only chip security plan leaves devices open to attack. The more effective way to thwart hackers is to combat both digital and analog threats by incorporating security-focused hardware modules built into the core machine design. This paper describes sources of vulnerabilities to cyber attacks and what infrastructure is needed to secure against them.

The SoC vulnerability landscape

Many SoC integrators are only too aware that security
enforced only by software is highly vulnerable to attack.
All that a hacker needs to do is find a way to replace key
parts of the bootloader or the low-level firmware to
compromise other software in the system used to
support secure access.

The increasing integration of edge devices
into large-scale distributed systems provides motivated
groups with an increasingly large attack space. To maximize their potential for success, they will use
multiple attack types. Sometimes, this is a matter of
trying different approaches until one works. But, thanks
to the use of more advanced statistical tools and
machine learning, malicious users are combining
information from multiple sources to reverse-engineer a
target and increase its vulnerability to the final attack. An example of the use of machine learning in
attacks is side-channel analysis, an approach
that aims to obtain the private keys
employed by an embedded cryptocore.

This paper outlines the landscape of security threats to SoCs and where vulnerabilities lay. We describe available countermeasures, including a comprehensive hardware-based
cybersecurity infrastructure that combines the Tessent Embedded Analytics embedded on-chip analytics and Agile Analog on-chip analog monitoring IP.