LG Electronics: Video Encoder IP Design Optimization and Verification Using the Catapult Platform
As the algorithmic complexity of intellectual property (IP) designed for semiconductors increases, the time and effort required for IP development and verification escalates. This shift is contributing to longer development cycles in the semiconductor industry, becoming a major factor delaying time-to-market (TTM). Additionally, optimizing power, performance, and area (PPA) to meet the requirements of various product lines is crucial for competitiveness in the IP landscape. This necessitates efficient development and verification of complex IP blocks, as well as enhancing productivity through IP reuse, which is challenging due to the need for managing various hardware versions of complex base logic, making maintenance difficult. To address this, LG Electronics’ SoC Center has adopted CatapultTM HLS (High-Level Synthesis) and used it to design a highly complex video encoder. Through this new design approach, LG Electronics’ SoC Center concluded that adopting Catapult in IP development significantly increases efficiency in terms of time and cost, and there are plans to increase the use of Catapult in their future IP development projects.
