Fast & comprehensive High-Sigma Validation using Eldo's Fast_Fail_Prob

Scaling down process technology nodes has revolutionized the field of semiconductors in different applications such as Internet of Things (IoT), space, medical, automotive, and mobile phones. Every shrinking technology node and new technologies like FinFET and FDSOI, brings its own challenges. A key challenge is the increasing impact of process variability on the design. Another is the need for Ultra-Low Voltage (ULV) near-threshold operation to maintain ultra-low dynamic power consumption, which aggravates the impact of process variability. Finally, billions of transistors integrated on a single chip requires an assurance of very low probability of failure (~1ppb) of each design type in order to achieve good silicon yield.

Electro-thermal modeling and simulation

The designer needs to validate the design, including all the global and local process variation, to ensure no failures on silicon, because any re-spin due to silicon failure is a huge cost to the company. The classic method of validating the design against variability is Monte Carlo simulation, which needs hundreds of billions of samples to reach a failure probability of 1ppb (6 sigma). This is impractical to perform in a time-bound design cycle. This paper presents a practical method, Fast_Fail_Prob available in the Eldo® circuit simulator, to attain a high-sigma validation that provides the same accuracy as billions of brute-force Monte Carlo runs, with minimal number of simulations (reduced by a factor of 106) and the least designer intervention. Fast_Fail_Prob is an ideal solution for small designs such as standard cells, memory bitcells, and sense amplifiers. These designs represent highly repetitive IP in a SoC and require a very low failure probability. In addition, small blocks such as bandgaps and comparators built for automotive applications can also benefit from this solution. This solution is available in Eldo Classic and Eldo Premier and the combination of Fast_Fail_Prob with Eldo Premier enables designers to use it for larger designs such as memory blocks. Fast_Fail_Prob has numerous built-in features that allow the designer to extend the scope of validation with great ease. The paper explains these features using a memory bitcell example.