Skip to Main Content
white paper

Using Calibre for advanced IC packaging verification and signoff

Reading time: 5 minutes
2.5D-IC and FO-WLP Package Styles
As high-density advanced package designs evolve and become more common, an automated LVS-like flow to detect and highlight package connectivity errors is required. We explain the most common package verification issues and how designers can resolve them using Xpedition Substrate Integrator and Calibre 3DSTACK to provide a significant advantage over traditional LVS flows for HDAP.

Benefits of LVS capabilities for HDAP designers

When combined with the Xpedition Substrate Integrator, Calibre 3DSTACK provides

  • Automated analysis of HDAP connectivity verification requirements as well as integrated assembly-level DRC and LVS checking

  • Provides a significant advantage over traditional SoC LVS flows for HDAP

  • Simplify and speed up the package verification flow, while ensuring full coverage and accurate results

  • Supports the growth of existing and emerging package technologies, and the new and innovative products they can deliver

To learn more about Package Design, visit.

Share