With the economics of transistor scaling no longer universally applicable, the industry is turning to innovative packaging technologies to support system scaling demands and achieve lower system cost.
The system technology co-optimization (STCO) process is where a SoC type system is disaggregated, or partitioned, into smaller modules (also known as chiplets) that can be asynchronously designed by dispersed teams and then combined into a larger, highly flexible system using chiplet-based package design, which may involve 3D packaging.
STCO starts earlier and higher up in the design process and focuses around disaggregating a system so the pieces can be built at a lower cost and be put together in a way that supports higher performance.
The shift-left approach happens when the verification analysis is performed as early as the the prototyping and design planning stage in the design cycle. Such early analysis in complex high density advanced packaging (HDAP) flows enables designers to spot potential issues early enough to avoid built-in constructs that cause design failures and require major redesign work which can be extremely expensive and time-consuming.
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