Smart down-sampling using SONR
This paper was originally presented at SPIE Advanced Lithography + Patterning 2022 and published in the proceedings.
Rehab Kotb Ali, Le Hong, "Smart down-sampling using SONR," Proc. SPIE 12052, DTCO and Computational Patterning, 120520N (26 May 2022); https://doi.org/10.1117/12.2614609
The Calibre SONR tool uses machine learning to Implement a smart pattern down-sampling process that selects the most representative wafer patterns during semiconductor manufacturing.
The post-design tapeout semiconductor manufacturing process requires multiple compact model-driven steps. Test pattern design is critical for producing stable, predictable compact models. Model calibration is usually performed on a test bank, which is a relatively small set of patterns expected to be included in this node.
After model calibration, checking model coverage and detecting hotspots at the full-chip level is performed. A full-chip design typically has 10s of millions of patterns—checking all of them would exceed the memory and runtime capacity of the compact model calibration flow. Down-sampling representative patterns from the real design is frequently used to boost model coverage and detect hotspots. Patterns chosen in the down-sampling process should cover all the different types of patterns in the full chip. Grouping similar hotspots together for root cause analysis can enhance yield by recalibrating the models to boost model coverage, or by adding new DFM rules to prevent hotspots.
The Calibre SONR tool is a complete machine learning platform that uses the design test chip and process information such as multi-layer interactions, OPC, and lithography and etching parameters to calculate needed features. It performs supervised, semi-supervised or unsupervised clustering, depending on the applications. The Calibre SONR tool has a machine learning database that handles large data sets efficiently with low memory and run time requirements. This platform can be used in multiple applications, including pattern reduction, pattern coverage, model coverage, layout comparison, hotspot detection, and defect classification.