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Rapid full-chip curvilinear OPC for advanced logic and memory

Patterning requirements of next-generation lithographic processes and the need to keep manufacturing costs down have pushed lithographers to explore the advantages of the curvilinear masks. Multiple studies backed by the experimental results have demonstrated the lithographic advantage of curvilinear (CL) photomasks over rectilinear approximations.

Manufacturability of CL masks has been limited due to the architecture of the Variable Shaped Beam (VSB) writers, which made it prohibitive from both mask data preparation (MDP) and mask writing perspectives. The availability of Multi Beam Mask Writers (MBMW) has removed these roadblocks and brought introduction of CL masks much closer to reality. The development of novel approaches for MDP and Mask Proximity Correction (MPC) brought further advances in availability of CL masks for high-volume manufacturing (HVM).

For CL mask preparation, inverse lithography technology (ILT) has been most promising, but it suffers from very long data preparation runtimes. This paper describes two approaches for CL mask generation that address the runtime associated with full chip ILT processing.

A version of this paper was presented at the 2021 SPIE Photomask Technology + EUV Lithography conference and published in the proceedings Volume 11855.

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