Power Integrity Effects of High Density Interconnect (HDI)
What are High Density Interconnect fabrication basics?
There are three basic elements to HDI fabrication:
Dielectric format: There are nine different general dielectric materials used in HDI processes such as photosensitive liquid dielectrics, polyimide flexible film, thermally cured dry films, conventional FR-4 cores and prepregs, and more.
Via formation: There are 10 types of via formations. Although laser via methods can cope with all four of the typical dielectric structures, photovia and plasma via methods are applicable to only 1 or 2 structures. This is one reason why leaser vias are more widely used today.
Metallization methods: There are 5 different methods of metallizing the IVHs used in HDI processes. They are:
Conventional electroless and electroplating Copper
Conventional conductive graphite or other Polymers
Fully and semi-additive electroless Copper
Conductive pastes or inks
Fabricating solid metal vias
How does High Density Interconnect aid in power integrity (PI)?
A significant reduction in the numbers of vias going through the inner layers of the board increases board real-estate available for routing.
The reduction in perforation of the power planes by the large number of anti-pads normally present in a chip pin-out results in a greater area of copper used to feed both AC and DC current to the chip power pins.
Less resistance in the current path, both to the chip and throughout the plane in general, results in less areas of high current density on the board.
Less inductance leading to the chip pins allows for appropriate switching current to reach the power pins, while also increases the effectiveness of the decoupling capacitors surrounding the IC.