white paper

Machine Learning at the Edge: Using HLS to Optimize Power and Performance

Machine Learning at the Edge: Using HLS to Optimize Power and Performance

Moving machine learning to the edge has critical requirements on power and performance. Using off-the-shelf solutions is not practical. CPUs are too slow, GPUs/TPUs are expensive and consume too much power, and even generic machine learning accelerators can be overbuilt and are not optimal for power. In this paper, learn about creating new power/memory efficient hardware architectures to meet next-generation machine learning hardware demands at the edge.

Share

Related resources

STMicroelectronics quickly brings automotive image signal processing to market with High-Level Synthesis
White Paper

STMicroelectronics quickly brings automotive image signal processing to market with High-Level Synthesis

STMicroelectronics crafted a unique High-Level Synthesis flow, enabled by templates, to design and verify an image signal processing (ISP) device, fostering getting it to market as fast as possible.

Catapult High-Level Synthesis & Verification
Learning Center Library

Catapult High-Level Synthesis & Verification

The Catapult High-Level Synthesis (HLS) library contains a set of modules to introduce Engineers to HLS and High-Level Verification.