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Introduction to multi-patterning

At 20 nm and below, mask shapes are so tightly packed that OPC alone cannot solve the lithography resolution problem with the design as drawn. The solution is multi-patterning, in which the original mask shapes are divided between two or more masks, such that each shape has enough space around it to enable the OPC manipulations to make it printable. Multi-patterning techniques include double, triple, and quadruple litho-etch and self-aligned processes. EDA software enables designers to implement multi-patterning design decomposition and resolve any errors accurately and efficiently.

Understanding multi-patterning decomposition and verification, whether it is double, triple, or quadruple litho-etch or self-aligned multi-patterning, is critical to manufacturing success.

Multi-patterning is essential to advanced node IC design, but the complexity of applying multi-patterning techniques to IC design layouts, as well as identifying and resolving errors, can be challenging. Whether designers are using a double, triple, or quadruple litho-etch patterning technique, or a self-aligned double or quadruple patterning method, understanding the concept and application of different multi-patterning techniques is essential to accurate design decomposition and error analysis. Multi-patterning EDA tools that automate design decomposition and provide fixing guidance during verification can help.

Understanding multi-patterning decomposition and verification, whether it is double, triple, or quadruple litho-etch or self-aligned multi-patterning, is critical to manufacturing success.

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