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white paper

High-performance silicon accurate transient noise simulation with Analog FastSPICE eXTreme technology

montage photograph showing a chip on a pcb on the left, a PCB with lit up traces in the middle and electrical signal waves on the right
Device noise is often the limiting factor in meeting performance targets for multiple applications and common circuit types. It is critical to accurately assess the noise performance in multiple circuit types to meet stringent power, performance, and area targets. The most common circuit types requiring transient noise include Phase Locked Loops (PLL), Data Converters (ADC, DAC), and SerDes. To achieve silicon correlation to within 1-2 dB of silicon, four key characteristics are required:

1. Accurate large-signal transient noise analysis

2. High-performance SPICE accurate simulator

3. Proven methodology for setting the appropriate SPICE accuracy and transient noise parameters for the best accuracy and performance trade-off

4. Proven post-processing scripts to accurately measure phase noise, jitter, SNR, and others built into the flow

This paper will highlight the four key elements in detail and provide simulation runtime performance data for multiple circuit types using Analog FastSPICE (AFS) and the latest Siemens technology targeting nanometer process nodes with Analog FastSPICE eXtreme (AFS XT). Additionally, we will highlight some of the key utilities and reference material included in the AFS platform to assist designers in setting up, simulating, and post-processing results. These include AFS Transient Noise Quick Start documentation, Solido Waveform Analyzer, DNA (Device Noise Analysis) Advisor and examples provided with each release. This comprehensive package provides designers with an extensive overview of the benefits offered in this context.

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