A customizable file merge process improves IC design flow and chip finishing productivity during chip assembly.
Despite decades of research and development, chip production still requires months of intense effort to produce manufacturable layouts. Chip finishing activities are an essential part of the final tapeout process. Performing chip finishing quickly and efficiently enables design teams to ensure their designs are optimized for manufacturing in a timely manner. One critical component of chip finishing is the file merging process that enables design teams to incorporate IP, blocks, and other design elements into a cohesive full-chip design. The Calibre DESIGNrev chip finishing platform includes multiple file merge options that can be combined to provide fast runtimes and minimize memory consumption, even for the largest and most complex designs.