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Did power management break my CDC logic?

An integrated approach to power domain and clock domain crossing verification

Reducing power consumption is essential for both mobile and data center applications. The challenge is to lower power while minimally impacting performance. The solution has been to partition designs into multiple power domains which allow selectively reducing voltage levels or powering off partitions. Traditional low power verification validates only the functional correctness of power control logic, it does not validate the impact of power logic on multi-clock logic. This paper explains the new low power CDC issues and the CDC verification techniques developed to verify low power designs.

UPF and low power design

The latest UPF standards introduce successive refinement for low power design and verification. Successive refinement supports the System-on-Chip (SoC) design and verification flow by allowing the UPF file to be refined and updated as it travels from IP design to SoC design to SoC place and route. The UPF will also be refined as it is updated to support both front-end tools such as verification tools as well as back-end tools such as physical implementation tools.

The power distribution network is a physical implementation feature that is added to the design late in the project cycle. In UPF, a power network grouping option, the power supply set, allows design teams to specify power groups without the definition of the power ports, nets, and switches and their connection to the power domains. The power supply set allows designers to define and test the power distribution network earlier in the project cycle before the power distribution network has been implemented.

The UPF power distribution network is an example of the successive refinement methodology where the power network can be incrementally built over the duration of the project cycle by the different teams on design proj ects. The block and system designers can begin to verify the power management logic before the power distribution network has been implemented, then the final power management logic verification will occur later in the design flow when the physical designers add the power distribution network.

Power elements are not directly instantiated in the design, but the power element instantiation is defined in the UPF.