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Curvilinear OPC application on 180nm silicon photonics layout for better performance

Calibre nmCLOPC MRC enforcement vs no enforcement
Advanced silicon photonics (SiPho) device designs requires RET OPC technology to increase manufacturability. However, the traditional OPC solution can’t handle SiPho designs very well because of the skew edges. The Inverse Lithography Technology (ILT) is an alternative way to do however this solution suffers a very long runtime for the full- chip run. We applied a new full chip Curvilinear (CL) OPC solution which is designed for curvilinear layouts. CLOPC can be used for full-chip photonics designs with good device performance. This paper describes the application of curvilinear OPC on 180nm silicon photonics layouts.

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