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Configurable, easy-to-use, packaged reliability checks

IC design reliability verification flow showing user input and input constraints going into the Calibre PERC package manager, which uses a checks database to then launch the checks and return the results.
While the need for accurate and precise reliability verification has grown significantly, ensuring IC reliability with existing verification techniques has been a major challenge for IC design companies. Technology scaling combined with the rapid growth in different types of design applications has increased both the number and type of reliability checks required, as well as their complexity. In addition to foundry reliability rule decks, every design company typically has additional reliability requirements based on the unique needs and uses of their products. Creating custom, pre-coded checks provide the additional, focused reliability coverage that supports market success. The Calibre PERC packaged check framework permits simple selection and configuration of pre-coded reliability checks, maximizing ease-of-use and minimizing runtime setup.

User-friendly packaged checks flow ensures fast, consistent IC design reliability verification

Although foundry rule decks provide a solid reliability baseline, today’s short design cycle encourages companies to supplement foundry reliability flows with additional custom checks based on the product’s application to ensure a thorough verification of reliability requirements. Creating custom checks is a useful and often necessary means of ensuring that all of a company’s reliability verification needs are met. However, the increasing number of reliability checks for different applications, and the increasing complexity of these checks, exposes the need for a verification flow in which designers can select and configure such pre-coded checks quickly and easily, without having to manage check complexities during the run. Because designers can use the Calibre PERC packaged checks flow to select and combine custom checks without having to worry about coding any complex setup or runtime conditions, running reliability verification is easier, faster, and more consistent, which helps shorten the IC design time cycle while safeguarding design reliability.

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