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Automated design-aware optimized fill ensures both timely design closure and design reliability

Diagram showing two orange critical nets surrounded by blue fill insertions. A transparent yellow rectangle with a red outline indicates the fill keep-out zone needed to protect the nets.
Adding metal fill to an IC layout is a mandatory step at advanced process nodes to ensure manufacturability and high yield. Designers strive to maximize fill insertion density ratios while minimizing the resistance and capacitance impacts of fill on critical nets and devices. Manual identification of these critical nets and devices is not practical or scalable because it requires significant time and resources. Linking Calibre PERC automated critical net recognition with Calibre YieldEnhancer SmartFill optimized fill insertion is an innovative approach that can speed up and automate the identification of critical nets and devices. This automated design-aware optimized fill methodology provides significant benefit for analog and RF designs such as high-speed intellectual property (IP) by minimizing any parasitic capacitance increase due to fill patterns while still enhancing design manufacturability.

Automated identification of critical or sensitive nets and devices in IC designs for enhanced protection during fill insertion

Automated circuit recognition is needed to capture complex topologies that can quickly and accurately identify critical nets in the design. Combining context-aware analysis with functionality such as circuit pattern matching is an innovative approach that can speed up and automate processes like the identification of critical nets and devices while allowing for potential variations in circuit schemes. Identifying critical nets in the netlist, finding corresponding geometries, and generating geometrical marker layers can be automated, and the results used to inform the fill process, significantly reducing the time and resources required. To save even more time, designers can re-use the output database created in the LVS run to obtain the design layout netlist. This combination of multiple functionalities enables the automated identification of critical or sensitive nets and devices for enhanced protection during fill insertion.

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