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2022 Wilson Research Group FPGA functional verification trends

2022 Wilson Research Group functional verification study: FPGA functional verification trend report
This report presents those results from the 2022 Wilson Research Group Functional Verification Study that were focused on the Field-Programmable Gate Array (FPGA) segment. The findings from this study provide invaluable insight into the state of today’s FPGA market in terms of both design and verification trends.

Introduction

This report presents field-programmable gate array (FPGA) functional verification trends based on the 2022 Wilson Research Group functional verification study. While multiple studies focused on general IC/ASIC functional verification trends have been published, [1, 2, 3, 4, 5] to our knowledge our 2018 study was the first to specifically focus on FPGA functional verification trends. [6, 7] Our 2022 study builds on our previous studies by providing the latest industry trends.

A. The global FPGA semiconductor market

IBS estimates that the global semiconductor market was valued at $547 billion in 2021. While the market is expected to decline to $545 billion in2023, it is optimistically projected to grow to a value of $635 billion by 2025. The FPGA portion of the semiconductor market is valued at about $5.3billion. [8] The FPGA semiconductor market is expected to reach a value of $8.1 billion by 2025.The growth in this market is driven by new and expanding end-user applications related to datacenter computing, networking, and storage, as well as communications.

Historically, FPGAs have offered two primary advantages over ASICs. First, due to their low NRE, FPGAs are generally more cost effective than IC/ASICs for low volume production. Second, FPGAs’ rapid prototyping capabilities and flexibility can reduce the development schedule since a majority of the verification and validation cycles have traditionally been performed in the lab. More recently, FPGAs offer advantages related to performance for certain accelerated applications by exploiting hardware parallelism (e.g., AI Neural Networks).

The IC/ASIC market in the mid- to late-2000s timeframe underwent growing pains to address increased verification complexity. Similarly, we find today’s FPGA market is forced to address growing verification complexity. With the increased capacity and capability of today’s complex FPGAs and the emergence of high-performance SoC programmable FPGAs (e.g., Xilinx Zynq® UltraSCALE+, Intel® Stratix®, and Microsemi SmartFusion®), traditional lab- based approaches to FPGA verification and validation are becoming less effective.

In Section II, we quantify the ineffectiveness of today’s FPGA verification processes in terms of nontrivial bug escapes into production.

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