NVIDIA: Running Trillions of Cycles in Days vs. Years: Accelerating verification of AI targeted CPU design with high-performance prototyping

Our AI and SOC based designs face enormous verification needs that require running very large amounts of SW and Data for a prolonged duration prior to the availability of Silicon. While some of the verification payload can be cut down into modular portions, many others require a complete and in context verification payload that mimic real world environment.

Traditional verification platforms are simply too slow and require hundreds of days or multiple years to accomplish the target verification cycle. In this presentation, we show how a very high performance prototyping system can cut the verification cycle to days.

We will also show how a fully scalable and granular FPGA prototyping architecture enables maximal system utilization, and supports not only multiple design copies, but also multiple simultaneous users. Finally, we will discuss how Veloce proFPGA CS supported our mix of virtual and hardware interfaces designed to achieve the highest performance and support a realistic system-level environment. We will close by showing attendees how we integrate a high-speed prototyping methodology into Nvidia verification workflow.