Tessent MemoryBIST provides a complete solution for at-speed testing, diagnosis, repair, debug and characterization of embedded memories. It allows you to test and diagnose failures in memory die and in the through-silicon-via (TSV) connections between the memory and logic die within a stacked package. This solution supports any memory stacking configuration without any change to the test infrastructure. It can improve manufacturing yield by supporting column, IO and/or row redundancy in memories, thus calculating the optimal repair strategy when needed. Tessent MemoryBIST is recognized as the best performing and universal memory BIST for SRAMS in the industry.